BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:Europe/Stockholm
X-LIC-LOCATION:Europe/Stockholm
BEGIN:DAYLIGHT
TZOFFSETFROM:+0100
TZOFFSETTO:+0200
TZNAME:CEST
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=-1SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
TZNAME:CET
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=10;BYDAY=-1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20260625T133338Z
LOCATION:Bldg. 6 - 004
DTSTART;TZID=Europe/Stockholm:20260629T150000
DTEND;TZID=Europe/Stockholm:20260629T153000
UID:submissions.pasc-conference.org_PASC26_sess101_msa120@linklings.com
SUMMARY:Standardizing Memory-Centric Computing: Experiences from SYCL and 
 OneMCC
DESCRIPTION:Hyesun Hong, Youngjoo Ko, Hanwoong Jung, and Seungwon Lee (Sam
 sung Electronics, SAIT)\n\nThis talk presents our experience integrating S
 amsung's HBM-PIM into HPC applications using SYCL as a performance-portabl
 e programming model. We first summarize our SYCL+HBM-PIM co-design work, i
 llustrating how PIM kernels are exposed through vendor extensions while ma
 intaining the overall application structure in standard SYCL. This single-
 source approach enables consistent execution across PIM-enabled and conven
 tional platforms, which is vital for cross-validation and building scienti
 fic trust in results. We further describe the software interface extension
 s developed to provide a common programming foundation for diverse PIM/PNM
  devices. Building on these research foundations, we briefly introduce the
  OneMCC initiative—a collaborative effort with industry partners to standa
 rdize memory-centric computing interfaces—alongside our ongoing research i
 nto PIM directives for standard C code. Together, these efforts outline a 
 comprehensive roadmap toward a portable, interoperable, and reliable softw
 are ecosystem for next-generation memory-centric HPC systems\n\nDomain: En
 gineering, Computational Methods and Applied Mathematics\n\nSession Chair:
  Andrey Alekseenko (KTH Royal Institute of Technology, PDC Center for High
  Performance Computing)\n\n
END:VEVENT
END:VCALENDAR
